Simulation Analysis of InAlN/GaN Monolithic NAND Logic Cell

A. Chvala,L. Nagy,J. Marek,J. Priesol,D. Donoval, M. Vilhan, M. Blah,D. Gregusova,J. Kuzmik,A. Satka

2018 12th International Conference on Advanced Semiconductor Devices and Microsystems (ASDAM)（2018）

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摘要

This paper presents simulation analysis of monolithic integrated InAlN/GaN NAND logic cell comprised of depletion-mode and dual-gate enhancement-mode high electron mobility transistors. Calibrated static and dynamic electrophysical models are proposed for 2-D device simulations in Sentaurus Device environment. Circuit models of both transistors are designed and calibrated by experimental results and 2-D device simulations.

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关键词

monolithic integrated InAlN/GaN NAND logic cell,dual-gate enhancement-mode high electron mobility transistors,InAlN/GaN monolithic NAND logic cell,electrophysical models,2D device simulations,Sentaurus Device,InAlN-GaN

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