Impact of 1μ m TSV via-last integration on electrical performance of advanced FinFET devices

Gaspard Hiblot,Stefaan Van Huylenbroeck,Geert Van der Plas,Bart De Wachter,Adrian Vaisman Chasin,Ben Kaczer,Thomas Chiarella,Jerome Mitard, Steven De Muynck,Gerald Beyer,Eric Beyne

2018 IEEE 2nd Electron Devices Technology and Manufacturing Conference (EDTM)（2018）

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摘要

In this work, the impact of 1x5μm Via-last integration on an advanced bulk FinFET technology is investigated. We find that mechanical impact of TSV proximity is below detection limit, however plasma-induced damage (PID) is observed on small devices (high antenna aspect ratio). Finally, a back-side anneal raising the TSV thermal budget shows no increase of mechanical impact though it partially cures PID damage on small devices.

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关键词

mechanical impact,TSV proximity,plasma-induced damage,TSV thermal budget,FinFET devices,bulk FinFET technology,via-last integration,antenna aspect ratio,PID,back-side anneal,size 1.0 m,size 5.0 mum

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