New Insights on SOI Tunnel FETs with Low-Temperature Process Flow for CoolCube TM Integration
Solid-State Electronics(2018)
Abstract
•SOI Tunnel FETs were made using Low-Temperature process for 3D integration.•Dual ID-VDS verifies BTBT injection in TFETs and not Schottky Barrier tunnelling.•P-mode LT TFETs show ION similar to HT TFETs.
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Key words
Tunnel FET,TFET,SOI,Low temperature,SPER,Tunnelling,BTBT,3D integration
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