Experimental $I$ – $V(T)$ and $C$ – $V$ Analysis of Si Planar p-TFETs on Ultrathin Body

We present the experimental analysis of planar Si p-tunnel FETs (TFETs) fabricated on ultrathin body Silicon on Insulator (SOI) substrates by an optimized dopant implantation into silicide process. The average subthreshold swing of such planar TFETs reaches 75 mV/decade over four orders of magnitude of drain current. Emphasis is placed on the capacitance- voltage analysis of TFETs. In contrast to ...