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Selective GeOx-scavenging from interfacial layer on Si1−xGex channel for high mobility Si/Si1−xGex CMOS application

2016 IEEE Symposium on VLSI Technology(2016)

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Abstract
We demonstrate a technique for selective GeO x -scavenging which creates a GeO x -free IL on Si 1-x Ge x substrates. This process reduces N it by >60% to 2e11 and increases high-field mobility at N inv =1e13 cm -2 by ~1.3× in Si 0.6 Ge 0.4 pFETs with sub-nm EOT.
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Key words
interfacial layer,CMOS,pFET,EOT,Si1-xGex,GeOx,Si-Si1-xGex
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