Experimental demonstration of the active trench layout tuned 1200V CSTBT™ for lower dV/dt surge and turn-on switching loss

Kazuya Konishi, Ryu Kamibaba,Mariko Umeyama,Atsushi Narazaki,Tetsuo Takahashi,Akihiko Furukawa,Masayoshi Tarutani

2016 28th International Symposium on Power Semiconductor Devices and ICs (ISPSD)（2016）

引用 13|浏览4

暂无评分

摘要

Optimization of a cell structure affecting gate capacitance must have an important role to upgrade usability of IGBT at high frequency operation. In this paper, we report an experimental study on the IGBT cell structures with various arrangements of active trenches connected to gate. Utilizing the advanced active trench layout with well-balanced capacitance realized to lower dV/dt surge and turn-on switching loss.

查看译文

关键词

IGBT,Active trench,Capacitance,dV/dt surge,Switching loss

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要