CMOS-Based High-Density Neural Probes with Improved Scheme for Addressing Recording and Stimulation Channels☆

This paper presents the design, fabrication and characterization of high-density neural probes based on complementary-metal-oxide-semiconductor (CMOS) technology. A new version of the electronic depth control (EDC) addressing scheme is implemented in the slender probe shaft enabling an increased number of simultaneously addressable electrodes compared to our previous EDC devices. Two further channels allow operating selected electrodes for purposes of stimulation or local referencing. Probes with a shaft width of 100 mu m and lengths up to 10 mm carrying a maximum number of 334 electrodes with an inter-electrode spacing of 30 mu m have been implemented. The integrated CMOS circuitry is realized using the commercial 0.18 mu m double-poly, six-metal CMOS process from XFAB, followed by post-CMOS processing of the electrode metallization and probe geometry. The probe functionality is verified by measuring the impedance of single and combined electrodes. Pt and IrOx electrodes are characterized; they reveal impedance values of 2 +/- 0.9 M Omega and 162 +/- 40 k Omega, respectively, at 1 kHz. (C) 2015 The Authors. Published by Elsevier Ltd.