Non-functional Constraints Annotation to Real-Time Embedded System Design

Development of Real-Time Embedded Systems (RTES) is currently a great challenge, as industry has to coherently model, develop and evaluate functional and non-functional requirements of these systems. Several approaches to RTES specification and design have been proposed in past years, but they most often fail to support early timing representation and, also, for advanced evaluation of timing constraints. Furthermore, not all of these approaches describe non-functional constraints in all viewpoints, models and refinements along the system design process. This research aims to identify and model real-time and embedded constraints in system design artifacts and, also, to refine and trace them along of architectural viewpoints. MARTE constraints have been consistently applied in design models and implemented at lower abstraction models. Here, timing constraints generation are performed from the graphical models to the final code models. Additionally, a case study in the automotive domain has been proposed in order to check the imposed timing constraints regarding specification of architectural models.