Evaluating Celerity: A 16-nm 695 Giga-RISC-V Instructions/s Manycore Processor With Synthesizable PLL
IEEE Solid-State Circuits Letters(2019)
Abstract
This letter presents a 16-nm 496-core RISC-V network-on-chip (NoC). The mesh achieves 1.4 GHz at 0.98 V, yielding a peak throughput of 695 Giga RISC-V instructions/s (GRVIS), a peak energy efficiency of 314.89 GRVIS/W, and a record 825 320 CoreMark benchmark score. Unlike previously reported
[1]
, this new score was obtained without modifying the core benchmark code. The main feature is the NoC architecture, which uses only
$1881~\mu \text{m}^{2}$
per router node, enables highly scalable and dense compute, and provides up to 361 Tb/s of aggregate bandwidth.
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Key words
Celerity,manycore,network-on-chip (NoC),RISC-V
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