3.7 A 10mW 16b 15MS/s Two-Step SAR ADC with 95dB DR Using Dual-Deadzone Ring-Amplifier

2019 IEEE International Solid- State Circuits Conference - (ISSCC)(2019)

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摘要
The two-step SAR architecture has been a popular choice for power-efficient ADCs used in applications such as medical imaging. The simple and scalable architecture of the SAR ADC enables efficient multi-bit conversion per stage [1, 2] however, the maximum performance of the two-step SAR is limited by the residue amplifier. The ring amplifier (RAMP) has enabled efficient two-step SAR ADCs [3]. Despite this, RAMP-based high-precision ADCs (>16b) remain unexplored. This paper presents a two-step SAR ADC utilizing a fully differential RAMP achieving 95dB DR. Two techniques that contribute to the energy-efficiency of the ADC are also presented: dynamic digital supply and DAC impedance-matching.
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