Front-end ASIC for germanium strip detectors

The characteristics of a recently developed front-end application specific integrated circuit (ASIC) designed for high-purity germanium (HPGe) strip detectors are detailed. The ASIC contains 32 channels, and can instrument either cathode or anode signals from the HPGe detector. The channels provide low-noise charge amplification, four shaping times, four gain ranges, trimmable discrimination for each channel, time to analog output, and peak detectors with analog memory. The channels process events in parallel, and the ASIC emits a logical-OR of the internal discriminators for external control. Each channel contains a time-to-analog circuit to allow the depth of interaction in a detector to be determined. The ASIC has a small noise slope, allowing it to maintain germanium energy resolution at the large, 30 pF, input capacitance of a germanium strip detector connected through the cryostat by a kapton flex cable. The ASIC sparsifies the triggered channels for low deadtime readout. Each channel dissipates 6.2 mW and covers an energy range up to 4 MeV in HPGe. Measurements demonstrate an equivalent noise charge (ENC) of 260 electrons at an input capacitance of 32.5 pF with a slope of 6.4 electrons/pF for a peaking time of 2μs.