Digital Estimation and Compensation of Analog Errors in Frequency-Interleaved ADCs
JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS(2019)
Abstract
A novel digital compensation scheme for measuring, estimating and correcting linear weakly time-varying analog errors in frequency-interleaved analog-to-digital converters (FI-ADCs) is presented. This method features three important improvements over existing approaches: First, the Wigner-Ville distribution (WVD) is used to better estimate the nonstationary analog channel frequency response (ACFR) spectrum. Secondly, the estimated ACFR spectrum is approximated with a rational polynomial model using the l(1)-norm metric. The corresponding l(1)-norm minimization problem is solved using a primal-relaxed dual global optimization (PRD-GOP) method. Thirdly, the digital compensation circuitry is designed utilizing a preconditioned biconjugate gradient stabilized (BICGSTAB) algorithm that yields a computationally efficient solution. Numerical experimentations have been conducted and the outcomes validate the feasibility and superior performance of this proposed method.
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Key words
Analog-to-digital converter (ADC),filter bank,analog error,frequency-interleaving,pole-zero signal modeling,time-varying system
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