Methodology for 3D Package Selection using Thermal Violation Region Graph

3D packages are considered as a high-end mobile processor since they have better performance and more functionality. Commonly, Package on Package (POP) is used, but the development of System in Package (SIP) as a 3D package is in progress despite its incompleteness. In terms of thermal performance, there is no consistent answer about whether POP is better than SIP. Therefore, to develop a package roadmap or decide on a package type, there must be a method to thoroughly overview the thermal performance. We propose a method to predict the temperature of the Memory and SOC using an intuitive contour graph for various power sets of Memory and SOC. This graph provides the design criteria by showing the critical power combination that reaches the temperature limit of each chip. Using this approach, we could review the region of power set where POP or SIP is better than others for multiple operating scenarios. The difference in self-heating and coupling effect for each package causes different results in the available package in each scenario. The temperature violation in the benchmark scenario and sustained scenario cause a performance degradation or failure in the device. Using this approach, the designer can simply and thoroughly review the package impact on the performance with respect to the operating scenario.