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Hole-Induced Threshold Voltage Shift Under Reverse-Bias Stress in E-Mode GaN MIS-FET

IEEE Transactions on Electron Devices(2018)

Cited 20|Views12
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Abstract
Under reverse-bias stress (i.e., OFF-state stress with VGS <; VTH) with high drain voltage, ultraviolet (UV) illumination and larger negative gate bias are found to accelerate the positive shift in threshold voltage (VTH) of enhancement-mode GaN MIS-FETs with fully recessed gate. These results suggest a hole-induced degradation mechanism. In the absence of UV illumination, holes could be generated...
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Key words
Logic gates,Stress,Lighting,Gallium nitride,Dielectrics,Degradation,Threshold voltage
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