Cmos Integrated 1 Ghz Ring Oscillator With Injection-Locked Frequency Divider For Low Power Pll

This paper introduces a low power frequency divider in an integrated CMOS phase-locked loop (PLL). An injection-locked frequency divider (ILFD) is designed with a current-mode logic (CIVIL) frequency divider to obtain the broadband and high frequency operation. Ring oscillator operates at 1 GHz and ILFD is supposed to provide the operation of divide-by-2 (/2). The structure of ILFD is designed to he similar with that of oscillator in order to adjust the frequency alignment between the oscillator and ILED. CML frequency divider is applied as the 2nd-stage divider. The proposed frequency divider is applied in the conventional PLL which is integrated with 0.18 mu m CMOS process. Simulation test shows that the /2 ILFD and /16 CML frequency divider operates accurately and the total power consumption of 32 mW is obtained at the input frequency of 1 GHz.