ESD failure analysis and robustness improvement for multi-STI-finger LDMOS used as output device

The MSF-LDMOS will suffer from high ESD failure risk when used as output device. In this work, it is found that the different ratios of STI width to silicon width have impact not only on breakdown voltage and R _{dson, sp} , but also on ESD robustness. Thus, the ESD failure mechanism of MSF-LDMOS is comprehensively investigated. Furthermore, a novel structure with multiple stair-STI fingers is proposed by alleviating the crowded current density. For the novel MSSF-LDMOS, the ESD robustness increases by 10% and the R _{dson, sp} decreases by 2.5% with only 1.2% reduction of breakdown voltage comparing with the conventional MSF-LDMOS.