Synthetic aperture radar with fast factorized backprojection: a scalable, platform independent architecture for exhaustive FPGA resource utilization

This paper introduces a Field Programmable Gate Array (FPGA) architecture for Synthetic Aperture Radar (SAR) processing. The architecture implements a Fast Factorized Backprojection (FFBP) algorithm for stripmap imagery. The designed architecture is platform independent as it only requires regular external memory, and by encapsulation the design in a superordinated system that controls board specific periphery, a switch between platforms is possible without design adjustments. The design supports scalable parallelism of dedicated processing modules in order to provide high performance and allow for exhaustive resource utilization of different FPGAs.