Etch process modules development and integration in 3D-SOC applications

Since the challenges of maintaining the Moore's law - through traditional dimensional scaling or exploiting new materials properties - are becoming increasingly difficult, 3D integration technologies are gaining more and more attention and importance. At system level 3D-SOC solutions are of great interest, in particular those obtained through Wafer-to-Wafer (W2W) bonding due to superior overlay performance. In this paper we present the development of etch process modules for fine pitch via last interconnects realized on wafers with dielectric bonding and their integration in a packaging test chip, followed by electrical characterization.