Method To Reduce Thd And Improve Efficiency In Sic Power Converter

this paper presents a method to reduce total harmonic distortion (THD) and improve efficiency of a topology of power converter using SiC devices. The method consists of two parts: the first part finds the optimum offset angle between two carrier signals that are sent to the first stage of the V-I converter and PWM modulation for the current source inverter (CSI), to reduce the total harmonic distortion in the output currents. The V-I converter transforms the voltage source of the battery into a current source for the inverter. The V-I converter operates at 30 kHz and the CSI at 55 kHz switching. The second part consists of using SiC devices to increase the operating range in frequency, and reduce the power losses in the devices, which will improve the efficiency of the analyzed topology. Besides, a comparative study between the SiC topology and a topology with conventional Si devices was proposed, the results of simulations analyzed the power losses and THD and compared with the purpose of validating the method proposal.