Reverse-Bias Stability And Reliability Of Hole-Barrier-Free E-Mode Lpcvd-Sinx/Gan Mis-Fets

with substantially limited holes generation, the E-mode n-channel LPCVD-SiNx/GaN MIS-FET delivers small NBTI (with V-DS = 0 V and a negative V-GS = -30 V) even without a hole-barrier. In high reverse-bias (i.e. high drain bias off-state with V-GS < V-TH and large V-DS) stress, larger negative gate-bias is found to accelerate positive shift in V-TH, suggesting a hole-induced gate dielectric degradation mechanism. It is also revealed that the hole-induced dielectric breakdown can be greatly contained when V-GS is limited to a few volts below V-TH.