Through-Silicon Via process module with backside metallization and redistribution layer within a 130 nm SiGe BiCMOS technology

Electronics Packaging Technology Conference Proceedings(2017)

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Abstract
The development of a Through-Silicon Via process module within a high performance SiGe BiCMOS technology is demonstrated. The TSV technology module including both the TSV fabrication process itself, the temporary wafer bonding for BiCMOS thin wafer handling and the thin wafer backside processing is developed on 8-inch wafer level and the optimization of the different process steps are explained. This process module is fully compatible with the qualified SiGe BiCMOS technology environment which enables very uniform and reliable TSV backside fabrication adding new functionalities into IHPs high performance SiGe BiCMOS technologies applicable for thin wafer applications and 3D heterogeneous integration.
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Key words
TSV technology module,BiCMOS thin wafer handling,wafer backside processing,reliable TSV backside fabrication,wafer applications,backside metallization,redistribution layer,wafer bonding,BiCMOS technology,size 130.0 nm,SiGe
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