Design and simulation of 30 Gbps optical half-adder and half-subtractor using highly nonlinear fibers

Optical circuits may be the next generation of computational schemes and the Highly Non Linear Fiber (HNLF) is a major building block of optical signal processing and optical transmission systems. The main objective of this work is to simulate the design an all optical Half-Adder (HA) and a Half Subtractor (HS) as well as to compare the simulated data with the currently published models. Previously implemented optical gates used semiconductor optical amplifiers (SOA) and other methods of modulation had results with less efficiency than HNLF. The better performance of HNLF is largely due to the fact that it is a passive device having a low noise ratio. This research article emphasizes on design and implementation of HA and HS at high bit rates. The Sum and Carry output spectrum for both HA and HS have been analyzed and the output power and extinction ratios for corresponding logic results have been measured. The maximum delays between the inputs have been calculated for the HA's optimum bit rate. This research article presents the successful operation of the logic gates at a maximum bit rate of 30 Gbps.