VHDL based circuits design and synthesis on FPGA: A dice game example for education

The DSP (Digital Signal Processing) and digital control have many advantages over the analog processing and control. Therefore, with the recent advancements of technology most of the signal processing and control tasks have been transferred from the analog to the digital domain. In order to keep the system efficient in terms of resources and power consumption, the specific system designs are opted. In this context, the VHDL (VHSIC Hardware Description Language) is extensively employed for these systems modelling and design. This paper presents an illustrative example of system modeling with VHDL for the education purpose. A synthesizable VHDL code is developed for a dice game. The system functionality is also verified with a C++ based system modeling and simulations. Unlike conventional programming methodologies, a relationship between the hardware and the developed software in kept. The developed system board level testing is performed. Results show a proper system functionality.