Embedded 2Mb ReRAM macro with 2.6ns read access time using dynamic-trip-point-mismatch sampling current-mode sense amplifier for IoE applications

Recent embedded ReRAM has a small resistance-ratio (R-ratio), which results in a small read sensing margin (I SM ). A larger BL current (I BL ) increases the input offset (I OS ) of current-mode sense amplifiers (CSA), resulting in low-yield read operations and long read access times (T CD ). This work proposes an I BL -aware small-I OS CSA, using a dynamic trip-point-mismatch sampling (DTPMS) scheme to increase tolerance for small I SM and residual BL precharge current (I PRE ) in order to improve memory yield and speed up T CD in cases of small R-ratio. A fabricated 65nm 2Mb ReRAM macro achieved T CD =2.6ns at VDD=1V. For the first-time, a ReRAM macro with sub-3ns T CD is presented.