A dual core power combining digital power amplifier for 802.11b/g/n with +26.8dBm linear output power in 28nm CMOS

This paper presents a digital power amplifier with two cores that are power combined for a Psat of +32.5dBm. Assisted by an on-chip digital pre-distortion, a transmitted output power of +26.8dBm for 802.11g 54 Mbps 64-QAM is achieved. This is the highest reported linear output power for a digital power amplifier designed for 802.11b/g/n applications in bulk 28nm CMOS. A total area of 0.36mm ² is used for the power amplifier cores and combiner. Drawing off of a 3.3V supply, this power amplifier has a drain efficiency of 21.2% at the maximum linear output power.