Dual-Layer Dielectric Stack for Thermally-Isolated Low-Power Phase-Change Memory

Thermal confinement has been used to reduce the reset energy of phase-change memory (PCM) devices and prevent heat losses into the surrounding structure. Specifically, for confined PCM cells, most of the heat losses were found to be into the surrounding dielectric. This work explores reset energy reduction attained by implementing a dual-layer dielectric stack as the dielectric in PCM devices to reduce heat loss to the surrounding dielectric. Reset energies of 69 ± 11 pJ and reset currents of 190 ± 13 μA are attained for a 500 nm × 20 nm heater contact area. Compared to SiO ₂ devices of identical dimensions, this shows a 44% current reduction and 54% energy reduction enabled with this simple modification of the fabrication process. Finite-element simulation results show that the energy reduction is primarily caused by improved heating of the phase-change layer and reduced heat loss into the dielectric.