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Hardware-in-the-loop co-design testbed for flying capacitor multilevel converters

2017 IEEE Power and Energy Conference at Illinois (PECI)(2017)

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Abstract
The multilevel flying capacitor topology is a promising technology for future electric aircraft, where high specific power density power converters are required. Hardware-in-the loop co-design can improve design throughput as more complex implementations of this technology are developed. This paper presents a comparison of hardware-in-the-loop emulation and hardware prototype results for 3-, 5- and 7-level flying capacitor converters. The fidelity of the emulation is investigated for both dc-dc and inverter operation and it is shown that, within certain limits, the converter operation can be emulated closely.
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Key words
flying capacitor multilevel converter topology,hardware-in-the-loop co-design testbed,future electric aircraft,high specific power density power converter,hardware-in-the-loop emulation,hardware prototype,7-level flying capacitor converter,5-level flying capacitor converter,3-level flying capacitor converter,DC-DC operation,inverter operation
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