Secure public key hardware for IoT applications

In order to secure Internet of Things (IoT) development and design of cryptographic protocols is imperative. However the severe resource constraints of IoT pose new challenges to the designers of mathematically complex public key ciphers like Elliptic Curve Cryptosystems (ECC). Moreover, the pervasive nature of IoT devices make side channels a potent threat. This paper suggests a new design paradigm of developing side channel secured ECC using a minimalistic hardware support. The proposed architecture is built on URISC (Ultimate RISC) instruction with additional protections against Horizontal Collision Correlation Attacks (HCCA) which is a very powerful technique to attack ECC using a single side channel trace. The side channel security is demonstrated to be obtained by a unique observation of operand sequencing during the underlying field multiplications, which nullifies the side channel threat.