Evaluation of Schottky barrier height on 4H-SiC m-face for Schottky barrier diode wall integrated trench MOSFET

We proposed an Schottky barrier diode wall integrated trench MOSFET (SWITCH-MOS) for the purposes of shrinking the cell pitch and suppressing the forward degradation of the body diode. A trench Schottky barrier diode (SBD) was integrated into a trench gate MOSFET with a wide shielding p+ region that protected the trench bottoms of both the SBD and the MOS gate from high electrical fields in the off state. The SBD was placed on the trench sidewall of the {1 (1) over bar 00} plane (m-face). Static and transient simulations revealed that SWITCH-MOS sufficiently suppressed the bipolar current that induced forward degradation, and we determined that the optimum Schottky barrier height (SBH) was from 0.8 to 2.0 eV. The SBH depends on the crystal planes in 4H-SiC, but the SBH of the m-face was unclear. We fabricated a planar m-face SBD for the first time, and we obtained SBHs from 1.4 to 1.8 eV experimentally with titanium or nickel as a Schottky metal. (C) 2017 The Japan Society of Applied Physics