Subleq $_\circleddash$ : An Area-Efficient Two-Instruction-Set Computer

IEEE Embedded Systems Letters(2017)

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Abstract
Applications with strict resource/power constraints demand the research and development of area-efficient processor designs that deliver reasonably good performance with small circuit area. While the ARM and RISC-V instruction set architecture (ISAs) are lightweight alternatives to ×86, they nevertheless consume considerable circuit area and power. In this letter, we return to a fundamental questi...
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Key words
Time complexity,Computers,Hardware,Table lookup,Reduced instruction set computing
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