SafeSoC: A fault-tolerant-by-redundancy evaluation card for high speed serial communications

2016 Conference on Design of Circuits and Integrated Systems (DCIS)(2016)

引用 1|浏览1
暂无评分
摘要
Some applications, as those related to space, require an extremely high level of safeness in the electronic hardware. In these cases, redundancy is almost the only way to be really safe; however, the control of redundant elements is not a simple task at all. In this article, we present SafeSoC, a safe electronic card designed for critical applications. Its central processor is an FPGA that manages a triple redundant sigma-delta A/D converter, a triple redundant RAM memory, a double redundant RS-232 channel and a double redundant CAN interface, in addition to some other peripherals. For the purpose of integrating with other systems, the FPGA has a VPX interface, and, in order to expand its functions, an FMC connector.
更多
查看译文
关键词
Safety,triple redundancy,VPX bus,FPGAs for safe applications
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要