An efficient placement of electronic components using genetic annealing algorithm: Comparative study

The optimization of printed circuit board and placing the electronic components with effectively is a challenging task. However, this work presents minimization of wire-length and failure rates of the board arising irregular local heat accumulation. By understanding the literature related to the problem in this work we obtained a comparative Pareto-optimal solution set which is absolutely dominated the earlier related solutions. The method proposed utilizes a procedure for representing multi-objective evolutionary algorithm which is capable of identifying repeated Pareto-optimal solutions. furthermore, the proposed idea is illustrated the flexibility with efficiency and parallel optimal placement of components and routing in the circuit layout. The concurrence and scope of escalation obtained in this work, and other convoluted placement design problems the proposed approach is well suitable. In this work we did iterative process to get more results.