Vertical Devices for Future Nano-Electronic Applications

N. Collaert,A. Veloso,T. Huynh-Bao,D. Yakimets,Ts. Ivanov,S. Ramesh,P. Matagne,A. Sibaja-Hernandez,Z. Liu,C. Merckling,N. Waldron,A. Thean

2016 IEEE Nanotechnology Materials and Devices Conference (NMDC)（2016）

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摘要

In this work, we will review the advantages and challenges of vertical devices which are seen as possible candidates to continue CMOS scaling. Different integration schemes will be discussed, also addressing the use of novel channel materials like III-V that could benefit from a vertical architecture to relax both gate length and wire diameter. Next to that, layout efficiency and the benefits of vertical MOSFETs for SRAM will be highlighted.

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关键词

SRAM,vertical MOSFET,vertical architecture,III-V channel materials,integration schemes,CMOS scaling,nanoelectronic applications,vertical devices

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