Chrome Extension
WeChat Mini Program
Use on ChatGLM

Parametric distribution and feature level analysis of different types of gated resistors

2016 IEEE 7th Annual Information Technology, Electronics and Mobile Communication Conference (IEMCON)(2016)

Cited 0|Views4
No score
Abstract
Gated resistor is an accumulation mode device without any junction (p-n junction or Schottky junction) in which the channel doping concentration is generally equal to doping concentration on the source and drain. Gated resistors have been fabricated to avoid the super steep and troublesome doping profile of conventional Metal Oxide Semiconductor Field Effect Transistor (MOSFET). It simplifies the current-flow due to the elimination of Semiconductor/Insulator interface to a great extent. The advantage of gated resistor includes the avoidance of the junction by which the process flow and architecture are highly simplified. Its self alignment behavior avoids the thermal budget needed for dopant activation after gate stack formation. Ultrathin device layer of very highly doped semiconductor is present in this device. Here we have analyzed different types of gated resistors, their architectures, characteristics, pros and cons. Different types of gated resistors included here are Multiple Independent Gate Field Effect Transistor (MIGFET) having more than one gate independent of each other, Junction-Less Tunnel Field Effect Transistor (JL-TFET) where tunneling effect occurs, Bulk Planar (BP) Gated Resistor forming over the bulk silicon, Silicon On Insulator (SOI) Gated Resistor in the presence of spacer and Vertical Slit Field Effect Transistor (VeSFET) where vertical silicon channel and metal pillar are present.
More
Translated text
Key words
Buried Oxide Thickness (BOX),Doping concentration gradient,High-k-spacers,Moore's law,Tunneling,Vertical slit
AI Read Science
Must-Reading Tree
Example
Generate MRT to find the research sequence of this paper
Chat Paper
Summary is being generated by the instructions you defined