Temperature-dependent electrical instability of p-type SnO thin-film transistors

The temperature-dependent electrical instability of p-type SnO thin-film transistors (TFTs) was investigated for various stress and temperature conditions. The fabricated SnO TFT was suitably passivated using an SU-8 organic layer to prevent environmental effects on the stress-induced instability. Under the negative gate bias stress, the transfer curves showed a parallel shift in the negative direction for every temperature studied (room temperature, 50 degrees C, and 80 degrees C). This result indicates that the transfer curve shift is mainly due to hole-trapping in the interface defect states of SnO TFTs. A much larger threshold voltage shift (Delta V-th) was observed at higher temperatures for short stress times, but Delta V-th became saturated under these conditions. This indicates that hole detrapping from the interface defect states is also accelerated at a high temperature when the stress time increases. During the recovery phase, the transfer curves shifted back toward the positive direction for each temperature point. The transfer curves moved in the positive direction with a large Delta V-th when the recovery time was 10 s, but the recovery rate slowed significantly when the recovery time extended beyond 10 s. Under the positive gate bias stress, the transfer curve shifted in the positive direction, mainly due to the electron trapping in the interface defect states. Similar temperature-dependence was observed in the time dependence of Delta V-th under the positive and negative gate bias stresses. During the recovery phase, the transfer curves moved back in the negative direction. The recovery rate increased with increasing temperature because of the accelerated electron detrapping from the interface defect states. (C) 2016 American Vacuum Society.