Accuracy-Enhanced Variance-Based Time-Skew Calibration Using SAR as Window Detector.
IEEE Trans. VLSI Syst.(2019)
摘要
This brief presents a time-interleaved (TI) successive-approximation-register (SAR) analog-to-digital converter (ADC) with an improved variance-based time-skew estimation technique, where we introduce a window detector (WD) based on a SAR ADC. It brings low hardware overhead and 10
4
times faster convergence speed when compared to the prior variance-based time-skew calibration. Postlayout simulation results of a 10-bit, 2-GS/s TI-ADC in 28-nm CMOS process verify the effectiveness of the proposed calibration. The results indicate that the signal noise and distortion ratio/spurious free dynamic range of the ADC improved from 41.9/48.6 to 53.2/63.3 dB after calibration. The total area and power are 0.105 mm
2
and 14.9 mW, respectively, where the WD occupies 0.0015 mm
2
and 0.55 mW.
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关键词
Calibration,Very large scale integration,Detectors,Bandwidth,Estimation,Clocks,Delays
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