A 1.6-GHz 3.3-mW 1.5-MHz Wide Bandwidth ΔΣ Fractional-N PLL with a Single Path FIR Phase Noise Filtering

This paper describes a novel ΔΣ quantization noise filtering method for wideband ΔΣ fractional-N PLL. A single path finite impulse response (FIR) filtering technique is realized through two-step phase interpolation. A prototype 1.6GHz ΔΣ fractional-N PLL with 1.5MHz wide loop bandwidth is implemented in 130nm CMOS process. Measurement results show that the proposed technique effectively reduces the high frequency quantization noise by 12dB and achieves an in-band phase noise of -101dBc/Hz at 400kHz and 2.14ps integrated jitter, while consuming only 3.3mW power and an area of 0.24mm ² .