A 1kx32 Bit Wdsram Page With Rapid Write Access

Theodoras Simopoulos,Themistoklis Haniotakis,George Alexiou

2018 13TH INTERNATIONAL CONFERENCE ON DESIGN & TECHNOLOGY OF INTEGRATED SYSTEMS IN NANOSCALE ERA (DTIS 2018)（2018）

引用 0|浏览21

暂无评分

摘要

In this work we present the hierarchical implementation of a 1Kx32 bit SRAM page which supports the WDSRAM - Write Driver SRAM - enhancements. The creation of the double-rows of the page's architectural scheme and the I/O tunnel between them is explained. The paper concludes with the presentation of the post-layout simulation results which confirm the fast write operation of the WDSRAM on the memory page level.

查看译文

关键词

WDSRAM, SRAM, static RAM, cache, memory page, memory write function, rapid write, rapid access, memory library, hardware cell library, layout, VLSI

AI 理解论文

溯源树

样例

生成溯源树，研究论文发展脉络

Chat Paper

正在生成论文摘要