Parallel Balanced-Bit-Serial Design Technique for Ultra-Low-Voltage Circuits With Energy Saving and Area Efficiency Enhancement.

IEEE Transactions on Circuits and Systems I: Regular Papers(2018)

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摘要
Ultra-low-voltage (ULV) satisfies the energy-constraint on-die acceleration of parallel processing in battery-powered Internet-of-Things applications. However, ULV brings serious leakage energy, throughput reduction, and delay variation issues. Parallel bit-serialization remarkably reduces leakage energy and enhances area efficiency; however, extremely reduced critical path aggravates delay variat...
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关键词
Throughput,Delays,Pipeline processing,Adders,Latches,Synchronization
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