Processor-in-memory support for artificial neural networks

2016 IEEE International Conference on Rebooting Computing (ICRC)(2016)

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摘要
Hardware acceleration of artificial neural network (ANN) processing has potential for supporting applications benefiting from real time and low power operation, such as autonomous vehicles, robotics, recognition and data mining. Most interest in ANNs targets acceleration of deep multi-layered ANNs that can require days of offline training to converge on a desired network behavior. Interest has grown in ANNs capable of supporting unsupervised training, where networks can learn new information from unlabeled data dynamically without the need for offline training. These ANNs require large memories with bandwidths much higher than supported in modern GPGPUs. Custom hardware acceleration and memory co-design holds the potential to provide real-time performance in cases where the performance requirements cannot be met by modern GPGPUs. This work presents a custom processor solution to accelerate two hetero-associative memories (Sparsey and HTM) capable of unsupervised and one-hot learning. This custom processor is implemented as an expandable ASIP built upon a configurable SIMD engine for exploiting parallelism. Functional specialization is implemented utilizing processor-in-memory techniques, which results in up to a 20× speedup and a 2000× reduction in energy per frame compared to a software implementation operating on a dataset for recognition of human actions.
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关键词
processor-in-memory support,hardware acceleration,artificial neural network processing,ANN processing,low power operation,real time operation,deep multilayered ANNs,unsupervised training,offline training,GPGPU,custom hardware acceleration-memory co-design,custom processor solution,heteroassociative memories,Sparsey,HTM,one-hot learning,unsupervised learning,expandable ASIP,configurable SIMD engine,functional specialization,human action recognition
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