Hardware Design Exploration Of Fully-Connected Deep Neural Network With Binary Parameters

This paper describes the exploration and analysis to design hardware of the fully connected deep neural network with binary weight value. The fully connected deep neural network is a promising reference model in order to implement fully hardwired classifier in mobile and IoT (Internet of Things) device. So, we analyzed its learning accuracy according to the number of layers and nodes through environment of reference simulation. And we analyzed hardware complexity and usage in terms of FPGA. We used Caffe framework to extract parameter and accuracy as reference model. We used Xilinx Vivado 2015.2 as synthesis tool for hardware design exploration.