High Frame Rate Vga Cmos Image Sensor Using Two Step Single Slope Adcs

A column-parallel two step Single Slope Analog-to-Digital Converter (SS ADC) for high frame rate VGA CMOS Image Sensor. The proposed circuit improves the sampling rate while maintaining the architecture of the conventional SS ADC for high frame rate CIS. The proposed structure does not have analog memory capacitor for storing the value of the first ramp step. The proposed two-step SS ADC has a 12 hit resolution and conversion time of 6.3 mu s at 62.5MHz clock frequency. The VGA CIS using two step SS ADC has the maximum frame rate of upto 320 frames/s.