A Low-Power Ldo Circuit With A Fast Load Regulation

By adding a Miller frequency compensation to the conventional LDO circuit that combines the super source follower and the voltage spike detection, a low -power LDO circuit is proposed to drive the load capacitance up to 10 pF with a fast load regulation. The LDO circuit converts a 5 V input to a 3.3V output, consumes 26 mu A, and settles in 75 ns at a 10 mA load current step in Ins.