A 2ghz 244fs-Resolution 1.2ps-Peak-Inl Edge-Interpolator-Based Digital-To-Time Converter In 28nm Cmos

Sebastian Sievert,Ofir Degani,Assaf Ben-Bassat,Rotem Banin,Ashoke Ravi,Bernd-Ulrich Klepser,Zdravko Boos,Doris Schmitt-Landsiedel

IEEE Journal of Solid-State Circuits（2016）

引用 71|浏览32

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摘要

This paper presents a 2 GHz digital-to-time converter (DTC) with 244 fs time resolution. The DTC consists of a multi-modulus divider (MMD) and a phase interpolator (PI) as coarse and fine tuning blocks, respectively. Control logic is implemented to prevent shoot-through current during the interpolation process in order to linearize the PI. The measured DTC's peak integral nonlinearity (INL) is 1.2...

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关键词

Tuning,Interpolation,Delays,Linearity,Signal resolution,Computer architecture,Jitter

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