Nonvolatile online CMOS trimming with magnetic tunnel junctions

2016 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH)(2016)

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摘要
We design a programmable output delay for digital circuits, making use of the nonvolatile bit storage in magnetic tunnel junctions (MTJs), which are available in hybrid processes with CMOS. We introduce our programmable clock buffers in VLSI dot product and fast Fourier transform (FFT) circuits at the 45 nm node. We reduce the FFT clock skew by 39%. These performance improvements and the ability to reduce timing violations come at less than a 1% increase in area and power.
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关键词
trimmer,nonvolatile,MTJ,STT-MRAM,timing analysis,clock skew,programmable delay
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