Refree: A Refresh-Free Hybrid DRAM/PCM Main Memory System

As the number of concurrently running applications on chip multiprocessors and the size of each application's working set increase, so does the demand for larger capacity memories. DRAM-based memories can no longer satisfy this growing demand due to their scalability limit. Hybrid main memories, such as DRAM plus PCM, have been proposed as a solution to this issue. However, using a very small DRAM is not effective in a hybrid memory system as well. On the other hand, the larger the DRAM size, the higher the refresh operation cost. In this paper, we introduce Refree, a scheme to eliminate DRAM refresh operations in a hybrid DRAM/PCM main memory system. When it is time to refresh a row, Refree evicts the row from DRAM instead. This can be done since a recently accessed row has already been "refreshed" by the access, while a row that hasn't been accessed for a long time is very likely to hold obsolete data and does not need to be refreshed and kept in the DRAM. If an evicted row is dirty, it will be written back to the PCM. To alleviate the potential performance loss due to the long PCM write latency, we propose a scheme that distributes writebacks of a dirty DRAM row over an epoch time (i.e., 128ms) to prevent the long-time obstruction of other requests to the PCM devices. Our simulation results reveal that Refree achieves an average of 11.7% reduction in memory power consumption and 4.2% performance improvement on a quad-core system running NAS and PARSEC applications with 4GB DRAM and 32GB PCM, compared to the standard auto-refresh scheme. Compared with a recently proposed refresh-reduction scheme, Refree can also save memory power by 3.1% on average with a negligible 0.2% performance loss.