A Skew-Free 10 GS/s 6 bit CMOS ADC With Compact Time-Domain Signal Folding and Inherent DEM.

An area-efficient, time-domain folding ADC achieves a 10 GS/s conversion speed and a 6 bit resolution in 65 nm CMOS. The natural time-domain folding effect of the ring oscillator (RO) leads to an inherently linear and compact folding operation. The single front-end voltage-to-time converter (VTC) running at the full conversion speed obviates any input buffer or clock-skew calibration often needed ...