A Survey Of Techniques for Architecting DRAM Caches.

IEEE Transactions on Parallel and Distributed Systems(2016)

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摘要
Recent trends of increasing core-count and memory/bandwidth-wall have led to major overhauls in chip architecture. In face of increasing cache capacity demands, researchers have now explored DRAM, which was conventionally considered synonymous to main memory, for designing large last level caches. Efficient integration of DRAM caches in mainstream computing systems, however, also presents several ...
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关键词
Random access memory,Bandwidth,Three-dimensional displays,Program processors,Memory management,Multicore processing
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