Exploiting Intracell Bit-Error Characteristics to Improve Min-Sum LDPC Decoding for MLC NAND Flash-Based Storage in Mobile Device.

IEEE Transactions on Very Large Scale Integration (VLSI) Systems(2016)

引用 44|浏览375
暂无评分
摘要
A multilevel per cell (MLC) technique significantly improves the storage density, but also poses serious data integrity challenge for NAND flash memory. This consequently makes the low-density parity-check (LDPC) code and the soft-decision memory sensing become indispensable in the next-generation flash-based solid-state storage devices. However, the use of LDPC codes inevitably increases memory r...
更多
查看译文
关键词
Parity check codes,Decoding,Sensors,Error probability,Throughput,Memory management,Threshold voltage
AI 理解论文
溯源树
样例
生成溯源树,研究论文发展脉络
Chat Paper
正在生成论文摘要