Session 27 overview: Hybrid and nyquist data converters.

The traditional boundaries between classical data converter architectures are being dissolved. Hybrid combinations that optimally exploit CMOS technology strengths have emerged. This session demonstrates multiple innovative hybrid and Nyquist-rate data converters ranging from 1 kHz to 4 GHz bandwidths and SNR levels exceeding 100dB. Papers in this session demonstrate hierarchical time interleaving, capacitor and opamp-sharing, and time interleaving skew calibration. SAR ADCs utilizing charge-injection DACs, embedded mismatch and noise shaping, and sub-ADCs using Delta-Sigma or digital slope techniques are disclosed. A noise-cancellation technique combined with amplitude and timing error pre-distortion demonstrates improved IM3 performance in a current-steering DAC.